All production versions of the LANai processor now use a single, unified compiler, lanai-gcc. The compiler is released under the Gnu Public License, version 2. Download and installation instructions are available.

Changes

The new lanai-gcc replaces the older lanai3-gcc and lanai7-gcc compilers, and add features to support the LANai9 processor. It is used as before, except that you must specify a -mversion option to specify what type of LANai code should be generated. Commonly used version options include the following:

Revision History

• gcc-2.6.3-based compilers
  • 2.6.3.a
    Original release.
  • 2.6.3.b
    Fixed non-portability in the Makefile and added code generation bug fixes.
  • 2.6.3.c
    Includes better optimization resulting in 6% faster code. Includes -msingle-context option to force the compiler to use all registers. The compiler now outputs debugging information. Also includes a few code generation bug fixes.
  • 2.6.3.d
    Modified to support the LANai3.2 operation by making -mno-pc-load the default. Also, fixed a bug related to this option, and modified the compiler not to generate "ld *,%isr", "ld *,%pc", "put *,%isr", and "put *,%pc" assembly instructions.
  • 2.6.3.e
    A new option -mno_partword_load was added and made the default. This options avoids a hardware bug in the LANai3.2 and LANai4.0 processors, which will be fixed in future versions. If you implement another workaround for this bug, you should override this option using -mpartword_load, which will generate significantly faster and smaller code.
  • 2.6.3.f
    A fatal compiler bug in revision E was corrected. Sometimes, this bug would not be fatal, but would cause incorrect code to be generated. All known bugs are corrected in release F.
  • 2.6.3.g
    A bitfield extraction bug and a typo in a warning message were corrected.
• gcc-2.7.2-based compilers
  • 2.7.2.a
    Starting with this release, the LANai compiler is based on on gcc-2.7.2. The new compiler includes an improved instruction scheduler, generating smaller faster code. For example, the Myricom MCP host to host latency was reduced by about 16% and the MCP memory usage was reduced by 8K.
  • 2.7.2.b
    In release 2.7.2.a, ginclude/lanai3_def.h was a symbolic link instead of a file. This problem is rectified in this release.
  • 2.7.2.c
    Corrects a bug in partword loads in release 2.7.2.b. This bug is never hit if you use the -mpartword-load option.
  • 2.7.2.d
    This version of the compiler has the following new features:
    • "long long" data type is now aligned to a 64-bit boundary.
    • -mversion options are now accepted allow the user to specify the LANai version for which code is to be generated. For example, the -m4.1 option generates code for the LANai4.1, allowing the compiler to use the partword-load instructions, which do not work on earlier versions of the LANai.
    • The documentation has been updated to reflect these changes.
    • Minor Makefile updates.
  • 2.7.2.e
    The ISR register is now treated as volatile. Calls to touch(ISR) are no longer needed.

    This change was affected by extending gcc to support global volatile register variables, and modifying the lanai4_def.h header file so that ISR is tagged volatile. The updated lanai4_def.h header file is included in the ginclude directory of the source destribution. This updated header file must be used to make ISR be treated as volatile.

    lanai4_def.h has also been modified so that the RESUME_USER and RESUME_SYSTEM macros are safe. With the old versions, a write to memory performed before the macro was called might not be performed until after the suspended context was resumed. Now, all writes will complete before the process is suspended.

  • 2.7.2.f
    The order of accesses to ISR and volatile memory are now strictly preserved.
  • 2.7.2.g
    A bug caused by indexing into large data structures (over 32K) was corrected.
  • 2.7.2.h
    A bug causing the compiler to erroneously optimize volatile register accesses was corrected.
  • 2.7.2.i
    A bug that caused the compiler to abort when compiling code for "long long int"s was corrected.
  • 2.7.2.j
    
    • The -msingle-context option is fixed, and the -mbig-contexts option was added.
    • The compiler can now store 0 and -1 to memory in a single instruction.
    • The compiler can now do single-bit tests in a single instruction.
    • Opportunites for delay slot scheduling have been improved.
  • 2.7.2.k
    Fixed an internal compiler error.
  • 2.7.2.l
    Includes latest lanai4_def.h header file.
  • 2.7.2.m
    Fixes bug when performing arithmetic shifts of a variable amount.
  • 2.7.2.n
    Fixed compiler abort when compiling code with partword loads. (A bug introduced in version J)
  • 2.7.2.1.a
    Merged changes from gcc-2.7.2 to gcc-2.7.2.1 into the LANai compiler. Note: Because the FSF version number has changed, you may need to completely rebuild the compiler for installation to be performed correctly.
  • 2.7.2.1.b
    Fixed bug in switch statements that potentially could cause incorrect execution when
    • the switch statement code exists outside the bottom 64K of memory, and
    • optimization is turned on.
  • 2.7.2.1.c
    Modified the compiler to not perform certain illigitimate optimizations on volatile registers (during the combiner pass) that would cause the registers to not be treated as volatile.
  • 2.7.2.1.d
    Fixed Makefile bug introduced in release 2.7.2.1.b that caused building problems when using Sun make.
  • 2.7.2.1.e
    Fixed a case of incorrect assembly output for "xnor" functionality.
  • 2.7.2.1.f
    Fixed a improper "put" instruction output that would cause fatal error.
  • 2.7.2.1.g
    Fixed a bug optimizing some switch statements that would cause incorrect assembly code to be emitted, causing the assembler to exit with an error.
    • 2.7.2.1.g1
      Fixed optimization error for shift instructions. Fixed a segfault in the Linux compiler (This error could potentially affect all platforms.)
  • 2.7.2.1.h
    Fixed optimization error for shift instructions, and fixed a potential stack memory leak when using functions with variable-length argument lists.
  • 2.7.2.1.i
    Fixed a bug introduced in 2.7.2.1.h that would cause the compiler to crash.
  • 2.7.2.1.j
    Fixed a segfault in the Linux compiler. This error could potentially affect all platforms.
• gcc-2.8.1-based compilers
  • 2.8.1.a
    Merged FSF changes. The compiler now runs under Windows NT.
  • 2.8.1.b
    Fixed an instruction scheduling bug that would cause the ISR register to be treated as non-volatile. This bug was introduced during the conversion to the gcc-2.8.1 code base.
  • 2.8.1.c
    Fixed a heinous register usage bug due to conflicts between Myricom and FSF modifications to GCC. This bug resulted in slow code that did not inforce the volatility of registers, but it is history now.
  • 2.8.1..8
    Disabled buggy 64-bit compare optimization from L7 support. Added 64-bit add and 64-bit subtract optimization to L7 support.
  • 2.8.1..9
    Fixed a fatal 64-bit constant bug introduced in the 2.8.1..8.
  • 2.8.1..10
    Vastly improved 64-bit arithmetic support.
  • 2.8.1..11
    Fixed fatal compiler error when compiling on 64-bit machines.
  • 2.8.1..12
    Fixed a silent partword store bug. The bug would cause a fullword store to be emitted sometimes where a partword store should have been used, corrupting surrounding bytes in the word including the store. This bug affects both the lanai3 and lanai7 compilers.
  • 2.8.1..13
    Added important LANai7 performance optimizations, including greatly improved delay slot filling and C "switch" statement support.
  • 2.8.1..14
    Fixed incorrect scheduling for user asm() statements including fewer than 2 instructions.
  • 2.8.1..15
    Added -mno-partword-store option to generate code compatible with third-party LANai interfaces that don't support byte reads and writes.
• gcc-2.95.2-based compilers
  • 2.95.2..0.9
    Integrated LANai3 and LANai7 back ends into a single `lanai' back end. Added support for lanai9. Improved 64-bit support.
  • 2.95.2..1.0
    Disabled a ld and increment peephole optimization that was incorrect for the L7.
  • 2.95.2..1.1
    Fixed a 64-bit load bug. Reenabled the ld and increment peephole optimization for the L9, where it is correct.
  • 2.95.2..1.2
    Never generally released.
  • 2.95.2..1.3
    Fixed a scheduler bug when storing constants to memory in a branch delay slot.
  • 2.95.2..1.4
    Fixed a 64-bit overlapping register-register move bug.
  • 2.95.2..1.5
    Fixed a bug in unsigned shifts right by variable amounts.